document number: 91058 www.vishay.com s-pending-rev. a, 02-jun-08 work-in-progress 1 power mosfet irf820as, sihf820as, irf820al, sihf820al vishay siliconix features ? low gate charge q g results in simple drive requirement ? improved gate, avalanche and dynamic dv/dt ruggedness ? fully characterized capacitance and avalanche voltage and current ? effective c oss specified ? lead (pb)-free available applications ? switch mode power supply (smps) ? uninterruptible power supply ? high speed power switching typical smps topologies ? two transistor forward ? half bridge and full bridge notes a. repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. starting t j = 25 c, l = 45 mh, r g = 25 , i as = 2.5 a (see fig. 12). c. i sd 2.5 a, di/dt 270 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. e. uses irf820a/sihf820a data and test conditions. product summary v ds (v) 500 r ds(on) (max.) ( )v gs = 10 v 3.0 q g (max.) (nc) 17 q gs (nc) 4.3 q gd (nc) 8.5 configuration single n -channel mosfet g d s d 2 pak (to-263) g d s i 2 pak (to-262) a v aila b le rohs* compliant ordering information package d 2 pak (to-263) i 2 pak (to-262) lead (pb)-free irf820aspbf irf820alpbf sihf820as-e3 SIHF820AL-E3 snpb irf820as irf820al sihf820as sihf820al absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 500 v gate-source voltage v gs 30 continuous drain current v gs at 10 v t c = 25 c i d 2.5 a t c = 100 c 1.6 pulsed drain current a, e i dm 10 linear derating factor 0.4 w/c avalanche current a i ar 10 a single pulse avalanche energy b, e e as 140 mj avalanche current a i ar 2.5 a repetiitive avalanche energy a e ar 5.0 mj maximum power dissipation t c = 25 c p d 50 w peak diode recovery dv/dt c, e dv/dt 3.4 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d mounting torque 6-32 or m3 screw 10 lbf in 1.1 n m * pb containing terminations are not rohs compliant, exemptions may apply
www.vishay.com document number: 91058 2 s-pending-rev. a, 02-jun-08 irf820as, sihf820as, irf820al, sihf820al vishay siliconix note a. when mounted on 1" square pcb (fr-4 or g-10 material). notes a. repetitive rating; pulse width limited by maximum junction temper ature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. c. c oss eff. is a fixed capacitance that gi ves the same charging time as c oss while v ds is rising from 0 to 80 % v ds . d. uses irf820a/sihf820a data and test conditions. thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient (pcb mounted, steady-state) a r thja -62 c/w maximum junction-to-case (drain) r thjc -2.5 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 500 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma d -0.60-v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.5 v gate-source leakage i gss v gs = 30 v - - 100 na zero gate voltage drain current i dss v ds = 500 v, v gs = 0 v - - 25 a v ds = 400 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 1.5 a b --3.0 forward transconductance g fs v ds = 50 v, i d = 1.5 a d 1.4 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 d - 340 - pf output capacitance c oss -53- reverse transfer capacitance c rss -2.7- output capacitance c oss v gs = 0 v v ds = 1.0 v, f = 1.0 mhz - 490 - v ds = 400 v, f = 1.0 mhz - 15 - effective output capacitance c oss eff. v ds = 0 v to 400 v c, d -28- total gate charge q g v gs = 10 v i d = 2.5 a, v ds = 400 v, see fig. 6 and 13 b, d --17 nc gate-source charge q gs --4.3 gate-drain charge q gd --8.5 turn-on delay time t d(on) v dd = 250 v, i d = 2.5 a, r g = 21 , r d = 97 , see fig. 10 b, d -8.1- ns rise time t r -12- turn-off delay time t d(off) -16- fall time t f -13- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --2.5 a pulsed diode forward current a i sm --10 body diode voltage v sd t j = 25 c, i s = 2.5 a, v gs = 0 v b --1.6v body diode reverse recovery time t rr t j = 25 c, i f = 2.5 a, di/dt = 100 a/s b, d - 330 500 ns body diode reverse recovery charge q rr - 760 1140 c forward turn-on time t on intrinsic turn-on time is neglig ible (turn-on is dominated by l s and l d ) s d g
document number: 91058 www.vishay.com s-pending-rev. a, 02-jun-08 3 irf820as, sihf820as, irf820al, sihf820al vishay siliconix typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature 0.01 0.1 1 10 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 0.1 1 10 1 10 100 20s pulse width t = 150 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 0.01 0.1 1 10 4.0 5.0 6.0 7.0 8.0 9.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 150 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 2.5a
www.vishay.com document number: 91058 4 s-pending-rev. a, 02-jun-08 irf820as, sihf820as, irf820al, sihf820al vishay siliconix fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 4 8 12 16 0 5 10 15 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 2.5a v = 100v ds v = 250v ds v = 400v ds 0.1 1 10 0.4 0.6 0.8 1.0 1.2 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 0.1 1 10 100 10 100 1000 10000 operation in this area limited by r ds(on) single pulse t t = 150 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms
document number: 91058 www.vishay.com s-pending-rev. a, 02-jun-08 5 irf820as, sihf820as, irf820al, sihf820al vishay siliconix fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case fig. 12a - unclamped inductive test circui t fig. 12b - unclamped inductive waveforms 25 50 75 100 125 150 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , case temperature ( c) i , drain current (a) c d p u lse w idth 1 s d u ty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) a r g i as 0.01 t p d.u.t l v ds + - v dd dri v er 15 v 20 v i as v ds t p
www.vishay.com document number: 91058 6 s-pending-rev. a, 02-jun-08 irf820as, sihf820as, irf820al, sihf820al vishay siliconix fig. 12c - maximum avalanche energy vs. drain current fig. 13a - maximum avalanche energy vs. drain current fig. 12d - basic gate charge waveform fig. 13b - gate charge test circuit 25 50 75 100 125 150 0 50 100 150 200 250 300 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 1.1a 1.6a 2.5a q gs q gd q g v g charge 10 v 0.0 0.5 1.0 1.5 2.0 2.5 i av , avalanche current ( a) 550 600 650 700 v d s a v , a v a l a n c h e v o l t a g e ( v ) d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + -
document number: 91058 www.vishay.com s-pending-rev. a, 02-jun-08 7 irf820as, sihf820as, irf820al, sihf820al vishay siliconix fig. 14 - for n-channel vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91058. p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - + + + - - - * v gs = 5 v for logic le v el de v ices peak diode recovery dv/dt test circuit v dd ? d v /dt controlled b y r g ? dri v er same type as d.u.t. ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer r g
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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